405 lines
11 KiB
Plaintext
405 lines
11 KiB
Plaintext
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{
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"board": {
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"3dviewports": [],
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"design_settings": {
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"defaults": {
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"board_outline_line_width": 0.09999999999999999,
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"copper_line_width": 0.19999999999999998,
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"copper_text_italic": false,
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"copper_text_size_h": 1.5,
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"copper_text_size_v": 1.5,
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"copper_text_thickness": 0.3,
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"copper_text_upright": false,
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"courtyard_line_width": 0.049999999999999996,
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"dimension_precision": 4,
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"dimension_units": 3,
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"dimensions": {
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"arrow_length": 1270000,
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"extension_offset": 500000,
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"keep_text_aligned": true,
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"suppress_zeroes": false,
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"text_position": 0,
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"units_format": 1
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},
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"fab_line_width": 0.09999999999999999,
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"fab_text_italic": false,
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"fab_text_size_h": 1.0,
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"fab_text_size_v": 1.0,
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"fab_text_thickness": 0.15,
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"fab_text_upright": false,
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"other_line_width": 0.15,
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"other_text_italic": false,
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"other_text_size_h": 1.0,
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"other_text_size_v": 1.0,
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"other_text_thickness": 0.15,
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"other_text_upright": false,
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"pads": {
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"drill": 0.762,
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"height": 1.524,
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"width": 1.524
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},
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"silk_line_width": 0.15,
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"silk_text_italic": false,
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"silk_text_size_h": 1.0,
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"silk_text_size_v": 1.0,
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"silk_text_thickness": 0.15,
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"silk_text_upright": false,
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"zones": {
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"min_clearance": 0.5
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}
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},
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"diff_pair_dimensions": [
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{
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"gap": 0.0,
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"via_gap": 0.0,
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"width": 0.0
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}
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],
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"drc_exclusions": [],
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"meta": {
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"version": 2
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},
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"rule_severities": {
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"annular_width": "error",
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"clearance": "error",
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"connection_width": "warning",
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"copper_edge_clearance": "error",
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"copper_sliver": "warning",
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"courtyards_overlap": "error",
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"diff_pair_gap_out_of_range": "error",
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"diff_pair_uncoupled_length_too_long": "error",
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"drill_out_of_range": "error",
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"duplicate_footprints": "warning",
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"extra_footprint": "warning",
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"footprint": "error",
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"footprint_type_mismatch": "ignore",
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"hole_clearance": "error",
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"hole_near_hole": "error",
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"invalid_outline": "error",
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"isolated_copper": "warning",
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"item_on_disabled_layer": "error",
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"items_not_allowed": "error",
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"length_out_of_range": "error",
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"lib_footprint_issues": "warning",
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"lib_footprint_mismatch": "warning",
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"malformed_courtyard": "error",
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"microvia_drill_out_of_range": "error",
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"missing_courtyard": "ignore",
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"missing_footprint": "warning",
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"net_conflict": "warning",
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"npth_inside_courtyard": "ignore",
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"padstack": "warning",
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"pth_inside_courtyard": "ignore",
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"shorting_items": "error",
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"silk_edge_clearance": "warning",
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"silk_over_copper": "warning",
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"silk_overlap": "warning",
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"skew_out_of_range": "error",
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"solder_mask_bridge": "error",
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"starved_thermal": "error",
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"text_height": "warning",
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"text_thickness": "warning",
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"through_hole_pad_without_hole": "error",
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"too_many_vias": "error",
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"track_dangling": "warning",
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"track_width": "error",
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"tracks_crossing": "error",
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"unconnected_items": "error",
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"unresolved_variable": "error",
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"via_dangling": "warning",
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"zones_intersect": "error"
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},
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"rules": {
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"max_error": 0.005,
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"min_clearance": 0.0,
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"min_connection": 0.0,
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"min_copper_edge_clearance": 0.0,
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"min_hole_clearance": 0.25,
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"min_hole_to_hole": 0.25,
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"min_microvia_diameter": 0.19999999999999998,
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"min_microvia_drill": 0.09999999999999999,
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"min_resolved_spokes": 2,
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"min_silk_clearance": 0.0,
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"min_text_height": 0.7999999999999999,
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"min_text_thickness": 0.08,
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"min_through_hole_diameter": 0.3,
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"min_track_width": 0.0,
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"min_via_annular_width": 0.09999999999999999,
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"min_via_diameter": 0.5,
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"solder_mask_clearance": 0.0,
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"solder_mask_min_width": 0.0,
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"solder_mask_to_copper_clearance": 0.0,
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"use_height_for_length_calcs": true
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},
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"teardrop_options": [
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{
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"td_allow_use_two_tracks": false,
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"td_curve_segcount": 5,
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"td_on_pad_in_zone": false,
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"td_onpadsmd": false,
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"td_onroundshapesonly": false,
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"td_ontrackend": true,
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"td_onviapad": false
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}
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],
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"teardrop_parameters": [
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{
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"td_curve_segcount": 5,
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"td_height_ratio": 1.0,
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"td_length_ratio": 0.5,
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"td_maxheight": 2.0,
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"td_maxlen": 1.0,
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"td_target_name": "td_round_shape",
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"td_width_to_size_filter_ratio": 0.9
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},
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{
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"td_curve_segcount": 5,
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"td_height_ratio": 1.0,
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"td_length_ratio": 0.5,
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"td_maxheight": 2.0,
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"td_maxlen": 1.0,
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"td_target_name": "td_rect_shape",
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"td_width_to_size_filter_ratio": 0.9
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},
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{
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"td_curve_segcount": 5,
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"td_height_ratio": 1.0,
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"td_length_ratio": 0.5,
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"td_maxheight": 3.0,
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"td_maxlen": 1.0,
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"td_target_name": "td_track_end",
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"td_width_to_size_filter_ratio": 0.9
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}
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],
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"track_widths": [
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0.0,
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0.2,
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0.3,
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0.4,
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0.8
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],
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"via_dimensions": [
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{
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"diameter": 0.0,
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"drill": 0.0
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}
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],
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"zones_allow_external_fillets": false
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},
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"layer_presets": [],
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"viewports": []
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},
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"boards": [],
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"cvpcb": {
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"equivalence_files": []
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},
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"libraries": {
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"pinned_footprint_libs": [],
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"pinned_symbol_libs": []
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},
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"meta": {
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"filename": ".explorer-both.kicad_pro",
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"version": 1
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},
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"net_settings": {
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"classes": [
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{
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"bus_width": 12,
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"clearance": 0.2,
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"diff_pair_gap": 0.25,
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"diff_pair_via_gap": 0.25,
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"diff_pair_width": 0.2,
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"line_style": 0,
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"microvia_diameter": 0.3,
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"microvia_drill": 0.1,
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"name": "Default",
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"pcb_color": "rgba(0, 0, 0, 0.000)",
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"schematic_color": "rgba(0, 0, 0, 0.000)",
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"track_width": 0.35,
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"via_diameter": 0.8,
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"via_drill": 0.4,
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"wire_width": 6
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},
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{
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"bus_width": 12,
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"clearance": 0.2,
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"diff_pair_gap": 0.25,
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"diff_pair_via_gap": 0.25,
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"diff_pair_width": 0.2,
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"line_style": 0,
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"microvia_diameter": 0.3,
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"microvia_drill": 0.1,
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"name": "power",
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"pcb_color": "rgba(0, 0, 0, 0.000)",
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"schematic_color": "rgba(0, 0, 0, 0.000)",
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"track_width": 1.0,
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"via_diameter": 0.8,
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"via_drill": 0.4,
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"wire_width": 6
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},
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{
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"bus_width": 12,
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"clearance": 0.2,
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"diff_pair_gap": 0.25,
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"diff_pair_via_gap": 0.25,
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"diff_pair_width": 0.2,
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"line_style": 0,
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"microvia_diameter": 0.3,
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"microvia_drill": 0.1,
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"name": "Board_0-Default",
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"pcb_color": "rgba(0, 0, 0, 0.000)",
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"schematic_color": "rgba(0, 0, 0, 0.000)",
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"track_width": 0.35,
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"via_diameter": 0.8,
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"via_drill": 0.4,
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"wire_width": 6
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},
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{
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"bus_width": 12,
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"clearance": 0.2,
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"diff_pair_gap": 0.25,
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"diff_pair_via_gap": 0.25,
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"diff_pair_width": 0.2,
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"line_style": 0,
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"microvia_diameter": 0.3,
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"microvia_drill": 0.1,
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"name": "Board_0-power",
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"pcb_color": "rgba(0, 0, 0, 0.000)",
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"schematic_color": "rgba(0, 0, 0, 0.000)",
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"track_width": 1.0,
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"via_diameter": 0.8,
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"via_drill": 0.4,
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"wire_width": 6
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},
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{
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"bus_width": 12,
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"clearance": 0.2,
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"diff_pair_gap": 0.25,
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"diff_pair_via_gap": 0.25,
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"diff_pair_width": 0.2,
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"line_style": 0,
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"microvia_diameter": 0.3,
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"microvia_drill": 0.1,
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"name": "Board_1-Default",
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"pcb_color": "rgba(0, 0, 0, 0.000)",
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"schematic_color": "rgba(0, 0, 0, 0.000)",
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"track_width": 1.0,
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"via_diameter": 0.8,
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"via_drill": 0.4,
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"wire_width": 6
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}
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],
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"meta": {
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"version": 3
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},
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"net_colors": null,
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"netclass_assignments": null,
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"netclass_patterns": [
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{
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"netclass": "Board_0-Default",
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"pattern": "Board_0-/DAC_OUT"
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},
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{
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"netclass": "Board_0-Default",
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"pattern": "Board_0-Net-(IC2-+INPUT)"
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},
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{
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"netclass": "Board_0-Default",
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"pattern": "Board_0-unconnected-(IC1-PA3{slash}EXTCLK-Pad7)"
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},
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{
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"netclass": "Board_0-Default",
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"pattern": "Board_0-Net-(IC2-GAIN_2)"
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},
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{
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"netclass": "Board_0-Default",
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"pattern": "Board_0-Net-(C10-Pad1)"
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},
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{
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"netclass": "Board_0-Default",
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"pattern": "Board_0-unconnected-(IC1-PA2-Pad5)"
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},
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{
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"netclass": "Board_0-Default",
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"pattern": "Board_0-/FILTER_OUT"
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},
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{
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"netclass": "Board_0-Default",
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"pattern": "Board_0-Net-(IC2-GAIN_1)"
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},
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{
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"netclass": "Board_0-Default",
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"pattern": "Board_0-unconnected-(IC2-BYPASS-Pad7)"
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},
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{
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"netclass": "Board_0-Default",
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"pattern": "Board_0-Net-(JPROG1-Pin_3)"
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},
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{
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"netclass": "Board_0-Default",
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"pattern": "Board_0-Net-(C5-Pad2)"
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},
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{
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"netclass": "Board_0-Default",
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"pattern": "Board_0-unconnected-(IC1-PA1-Pad4)"
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},
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{
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"netclass": "Board_0-Default",
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"pattern": "Board_0-unconnected-(IC1-PA7-Pad3)"
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},
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{
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"netclass": "Board_0-Default",
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"pattern": "Board_0-/PROG"
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||
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},
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||
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{
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||
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"netclass": "Board_0-Default",
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||
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"pattern": "Board_0-Net-(C1-Pad1)"
|
||
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},
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||
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{
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||
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"netclass": "Board_0-power",
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||
|
|
"pattern": "Board_0-VCC"
|
||
|
|
},
|
||
|
|
{
|
||
|
|
"netclass": "Board_0-power",
|
||
|
|
"pattern": "Board_0-GND"
|
||
|
|
},
|
||
|
|
{
|
||
|
|
"netclass": "Board_0-power",
|
||
|
|
"pattern": "Board_0-/PWR"
|
||
|
|
},
|
||
|
|
{
|
||
|
|
"netclass": "Board_0-power",
|
||
|
|
"pattern": "Board_0-/AUDIO_OUT*"
|
||
|
|
},
|
||
|
|
{
|
||
|
|
"netclass": "Board_1-Default",
|
||
|
|
"pattern": "Board_1-Net-(D1-K)"
|
||
|
|
},
|
||
|
|
{
|
||
|
|
"netclass": "Board_1-Default",
|
||
|
|
"pattern": "Board_1-VCC"
|
||
|
|
},
|
||
|
|
{
|
||
|
|
"netclass": "Board_1-Default",
|
||
|
|
"pattern": "Board_1-GND"
|
||
|
|
}
|
||
|
|
]
|
||
|
|
},
|
||
|
|
"pcbnew": {
|
||
|
|
"last_paths": {
|
||
|
|
"gencad": "",
|
||
|
|
"idf": "",
|
||
|
|
"netlist": "",
|
||
|
|
"specctra_dsn": "",
|
||
|
|
"step": "",
|
||
|
|
"vrml": ""
|
||
|
|
},
|
||
|
|
"page_layout_descr_file": ""
|
||
|
|
},
|
||
|
|
"schematic": {
|
||
|
|
"legacy_lib_dir": "",
|
||
|
|
"legacy_lib_list": []
|
||
|
|
},
|
||
|
|
"sheets": [],
|
||
|
|
"text_variables": {}
|
||
|
|
}
|