add support for dual channel sine waves

Firmware/include/sine.h

@@ -10,4 +10,5 @@
 #define MAX_ACHIEVABLE_FREQ 1000000
 
 void generateSine(float);
+void generateSines(float, float);
 void setupSine();

Firmware/src/main.cpp

@@ -10,5 +10,5 @@ void setup() {
 }
 
 FASTRUN void loop() {
-  generateSine(1000000);
+  generateSines(10000, 10000);
 }

Firmware/src/sine.cpp

@@ -50,4 +50,37 @@ FASTRUN void generateSine(float frequency){
         //Write the voltage on the DAC
         *(volatile aliased_int16_t *)&(DAC0_DAT0L) = LUT[(int)phase];
     }
+}
+//Write the DAC with using some parts of framework's Arduino.h, for higher speeds
+// Use FASTRUN to run code in RAM
+typedef int16_t __attribute__((__may_alias__)) aliased_int16_t;
+
+FASTRUN void generateSines(float frequency1, float frequency2){
+    startGenerating();
+
+    // Phase accumulator
+    float phase1 = 0;
+    float phase2 = 0;
+
+    //Constrain frequency
+    frequency1 = constrain(frequency1, 0, MAX_ACHIEVABLE_FREQ);
+    frequency2 = constrain(frequency2, 0, MAX_ACHIEVABLE_FREQ);
+
+    // Phase increment at each step
+    float delta_phi1 = frequency1 / SAMPLE_FREQ * LUT_SIZE; 
+    float delta_phi2 = frequency2 / SAMPLE_FREQ * LUT_SIZE; 
+    
+    while(generateWave){
+        // increment phase
+        phase1 += delta_phi1;
+        phase2 += delta_phi2;
+        
+        // handle wraparound           
+        if (phase1 >= LUT_SIZE) phase1 -= LUT_SIZE;
+        if (phase2 >= LUT_SIZE) phase2 -= LUT_SIZE;
+        
+        //Write the voltage on the DAC
+        *(volatile aliased_int16_t *)&(DAC0_DAT0L) = LUT[(int)phase1];
+        *(volatile aliased_int16_t *)&(DAC1_DAT0L) = LUT[(int)phase2];
+    }
 }

Firmware/src/square.cpp

@@ -42,5 +42,4 @@ FASTRUN void generateSquare(float frequency, int duty){
           delayCycles(dutyLowCycles);
       }
     }
-
 }

Firmware/src/wave.cpp

@@ -12,9 +12,11 @@ void setupWaves(){
   analogWriteResolution(12);
 
   // Enable DAC0, from framework's analogWriteDAC0, place here from higher speeds
-  // Reference voltage is 1.2V
   SIM_SCGC2 |= SIM_SCGC2_DAC0;
 	DAC0_C0 = DAC_C0_DACEN | DAC_C0_DACRFS;
+  // Enable DAC0, from framework's analogWriteDAC0, place here from higher speeds
+	SIM_SCGC2 |= SIM_SCGC2_DAC1;
+	DAC1_C0 = DAC_C0_DACEN | DAC_C0_DACRFS; // 3.3V VDDA is DACREF_2
 }
 
 // Wait time by counting clock cycles